2 881 703 libros electrónicos en 110 idiomas
¿No le conviene? No hay problema. Puedes devolver los artículos hasta 30 días
No se equivocará con un vale de regalo. El destinatario puede elegir cualquier producto de nuestra oferta.
Hasta 30 días para devoluciones
This book discusses the design and performance analysis of SDRAM controllers that cater to both real-time and best-effort applications, i.e. mixed-time-criticality memory controllers. The authors describe the state of the art, and then focus on an architecture template for reconfigurable memory controllers that addresses effectively the quickly evolving set of SDRAM standards, in terms of worst-case timing and power analysis, as well as implementation. A prototype implementation of the controller in SystemC and synthesizable VHDL for an FPGA development board are used as a proof of concept of the architecture template.§